PLC device having combined hardware and software input filtering

ABSTRACT

A programmable logic controller (PLC) device for effecting arithmetic operations of a sequential program by a microprocessor (1). The PLC device comprises a periodic signal generating circuit (2) for generating an interruption signal at a predetermined time interval, an input circuit (7) for receiving an external input signal, and circuits for effecting filter processing by reading a signal output by the input circuit at a predetermined time interval in response to the interruption signal. Since the filtering processing is effected by the microprocessor, a time constant of a filter can be changed by a program and can be also changed for each signal.

This application is a continuation of application number 07/305,868,filed as PCT/JP88/00561 on June 9, 1988, published as WO88/09963 on Dec.15, 1988 now abandoned.

TECHNICAL FIELD

The present invention relates to a PLC device for effecting arithmeticoperations of a sequential program, and more specifically to a PLCdevice for filtering an input signal of a microprocessor.

BACKGROUND ART

An input circuit of a PLC device is provided with a filter for removingnoise and preventing malfunctions due to chatter or the like. The inputcircuit is provided with hardware filters. For example, a circuitarrangement comprising a low pass filter of an integration circuitcomposed of a resistor a capacitor is generally used and an outputthereof is shaped by a Schmitt circuit.

Nevertheless, since a filtering function effected by the conventionalhardware filters requires a hardware filter circuit for each signal, thenumber of parts is increased, the cost of mounting becomes higher, and alarger space must be provided for mounting these parts. Further, therespective circuit elements must be changed to change a time constant ofa filter, which is practically impossible after the device has beenassembled. This is inconvenient when the PLC devices are installed invarious locations where a high level of noise occurs. In addition, afilter having a large time constant must be provided when an inputsignal has a low speed and a filter having a small time constant must beprovided when an input signal has a high speed, but the need to mountfilters having a different time constant for each signal on the sameprinted circuit board or the like complicates the manufacture of afilter hardware.

SUMMARY OF THE INVENTION

An object of the present invention is to solve the above problems and toprovide a PLC device for filtering of an input signal of amicroprocessor without using a hardware filter.

To achieve the above object, in accordance with the present invention,there is provided as shown in FIG. 1, a PLC device for effectingarithmetic operations of a sequence program by a microprocessor (1):comprising a periodic signal generating circuit (2) for generating aninterruption signal at a predetermined time interval; an input circuit(7) for receiving the external input signal; and filtering processingmeans for effecting a filtering process on a signal read from the inputcircuit at a predetermined time interval in response to the interruptionsignal.

The microprocessor reads a signal from an input circuit at apredetermined time interval, filters the signal and then takes in the asa signal to be processed. Accordingly, the hardware filter can beomitted and since the filtering processing is effected by themicroprocessor, a time constant of a filter can be changed by a program,and can be also changed each time a signal is read.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of an embodiment of the present invention;

FIG. 2 is a flowchart of an embodiment of the present invention; and

FIG. 3 is a time chart of a filtering process.

DESCRIPTION OF THE PREFERRED EMBODIMENT

An embodiment of the present invention will be hereinafter described indetail with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention,wherein 1 designates a microprocessor effecting an overall control of aPLC device, and 2 designates a periodic signal generating circuit forgenerating an interruption signal at a processes filters of an inputsignal in response to the interruption signal and then takes in thesignal for subsequent processing. Designated at 3 is a ROM for storing asystem program, and the microprocessor 1 controls the PLC device inaccordance with the system program of the ROM 3. Reference numeral 4designates a RAM for a workpiece which stores various data or the like,and 5 designates a RAM for storing a sequential processing program. Thesequential program is used for regulating a machine operation actuallycontrolled by the PLC device, and can be changed in accordance with achange in the machine operation. The RAM 5 is also connected to abattery 6 to maintain the sequential processing program even if thepower supply is accidentally turned off. Denoted at 7 is an inputcircuit having receiver circuits for receiving external input signalsfrom the machine or the like and causing the microprocessor to read outthe input signals through a bus. The respective receiver circuits of theinput circuit 7 have either no filtering function or a filteringfunction having a small time constant, because the filtering process iseffected by the microprocessor through software, as described later.Designated at 8 is an output circuit for outputting signals to operatethe machine or the like.

With the PLC device as described above, the filtering function of theinput circuit 7 is not effected by hardware. Namely, the microprocessor1 effects filtering by taking in a signal from the input circuit 7 inresponse to an interruption signal from the periodic signal generatingcircuit 2, and as a result, a time constant or the like of the filtercan be changed by merely changing the system program of the ROM 3.Further, the time constants of the filter can be easily changed becausethey are stored in the sequential program stored in the RAM 5, in a formof a parameter or the like.

Next, the operation of the microprocessor 1 will be described withreference to FIG. 2 which is a flowchart of the embodiment. As shown inthe drawing, the microprocessor 1 sequentially and periodically effectsthe processes S1, S2 and S3 as described below.

(S1) takes in an input signal. Note, the input signal has been filteredS4.

(S2) effects arithmetic operations of the sequence program: Here iteffects a sequential program for controlling the machine.

(S3) produces an output signal as a result of the sequential processingof the program and which signal controls the actual operation of themachine.

The processing flow then goes to the process S4 in response to aninterruption signal from the periodic signal generating circuit 2 whilethe program for the process S2 is effected.

Next, an example of a filtering process will be described with referenceto FIG. 3, which is a time chart for the filtering process. In thedrawing, the interruption signal is a signal output by the periodicsignal generating circuit 2 to the microprocessor 1 in FIG. 1; the inputsignal is a signal read from the input circuit 7 by the microprocessor 1in FIG. 1; and the taken-in signal is a signal used by themicroprocessor 1 as an internal signal after being filtered by themicroprocessor 1.

In the filtering process, when an input signal remains in the same stateafter two interruption signals have been produced (interruption signalsfor two clocks), the input signal is processed as a taken-in signal. Forexample, when the input signal at position A is high for only one clock,the taken-in signal is not changed but when the input signal at positionB is high for two clocks, the taken-in signal is made to high. On thecontrary, although the input signal at a position C is made low, thetaken-in signal is not changed but remains high because the input signalis low for only one clock. When the input signal at position D is lowfor two clocks, then the taken-in signal is made low. As describedabove, the filtering process prevents the appearance of the taken-insignal at the positions A and C of the input signal. Further, the numberof clocks for which the input signal can be ignored as the taken-insignal can be changed by the system program, and can be also changed inaccordance with the property of the respective signals. Furthermore, thenumber of clocks can be stored in the sequential program as a parameterand changed later.

According to the present invention, as described above, since the inputcircuit is not provided with hardware filter circuits and the filteringprocess is effected by the microprocessor through software, no filteringhardware parts are required. In addition, a time constant of the filtercan be easily changed by the system program or the like with ease.

We claim:
 1. A programmable logic control (PLC) device for effectingarithmetic operations, comprising:periodic signal generating means forgenerating an interruption signal at a predetermined time interval;input circuit means for receiving an external input signal, forfiltering the external input signal based on a first time constant andfor providing an output signal responsive to said filtering of theexternal input signal and; filter processing means for reading, inresponse to the interruption signal, the output signal from the inputcircuit means at said predetermined time interval, for filtering, inresponse to the interruption signal, the read output signal, forproviding, in response to the interruption signal, the filtered receivedoutput signal for use by the arithmetic operations based on a secondtime constant that is larger than the first time constant, andincludingmeans for executing the arithmetic operations based on asequential program, and for filtering the output signal in response toreceiving the interruption signal.